The present disclosure relates to integrated circuit (IC) fabrication, and more specifically, to interconnected integrated circuit (IC) chip structures and packaging for the same.
Integrated circuit (IC) chips can include billions of interconnected devices, such as transistors, resistors, capacitors, and diodes, etc., located in layers of material. Multiple IC chips may be interconnected to form multi-chip modules (MCMs) for electronic devices such as computers, mobile devices and gaming systems.
One challenge associated with the fabrication of MCMs includes difficulties with interconnecting the IC chips of the MCM. Interconnecting IC chips during the IC chip fabrication process may be difficult as a result of impenetrable structures, such as crack-stops, that surround and protect the IC components for each IC chip. One solution for interconnecting multiple IC chips includes using a series of packaging interconnects to connect the IC chips after fabrication and dicing. Challenges associated with packaging and/or assembly based interconnection of IC chips include limitations on minimum package size, limitations on the number of chips that may be interconnected, and quality of communication between the IC chips. Another challenge may include addressing limitations on IC chip size and compatibility of chips of different sizes for interconnection.